1. Field of the Invention
The present invention relates to a semiconductor device including upper and lower semiconductor switching elements, which are connected in totem pole and turned on alternately.
2. Description of the Related Art
A DC-DC converter is known as a device for converting a DC input voltage to a DC output voltage of a different level. The DC-DC converter generally comprises an upper semiconductor switching element and a lower semiconductor switching element connected in serial or so-called totem pole between an input voltage and a reference voltage. It also comprises an inductor connected from a node between these two semiconductor switching elements to a load. The upper semiconductor switching element may comprise a transistor such as a MOSFET or an IGBT. The lower semiconductor switching element may comprise a diode. The use of the diode causes a problem associated with a large power loss because it has a large forward voltage. Therefore, the lower semiconductor switching element may often comprise a voltage-controlled semiconductor element, such as a MOSFET, having low power consumption on conduction and capable of conduction controlling by a gate voltage in synchronous with conduction/non-conduction of the upper semiconductor switching element.
If both the upper and lower semiconductor switching elements comprise voltage-controlled semiconductor elements such as MOSFETs, it is required to prevent a through current from flowing through the upper and lower semiconductor switching elements when they are made conductive at the same time due to logic in the controller or noise. Therefore, between a conductive period of only the upper semiconductor switching element and a conductive period of only the lower semiconductor switching element, a period (dead time) is set to make both the transistors non-conductive. The dead time is determined to have such a length that prevents both the transistors from entering the state of conduction at the same time even if outer perturbation like a noise changes the time to turn on/off both the transistors. The dead time, if it is determined excessively longer, causes an increase in power loss. Therefore, various proposals have been made to minimize the required length of the dead time. For example, a publication of JP-A 2003-134802 discloses a circuit, which includes a comparator that detects if a control voltage applied to one of semiconductor switching elements lowers below a threshold voltage. The output from the comparator is employed to switch the conduction state of the other of the semiconductor switching elements (paragraphs [0016]-[0019], FIGS. 1 and 6).
In the circuit disclosed in the publication, however, after the comparator detects that the control voltage to one of the upper or lower semiconductor switching elements lowers below the threshold voltage, the control voltage to the other of the upper or lower semiconductor switching elements is elevated up to the threshold voltage or higher to switch the other from the non-conductive state to the conductive state. Accordingly, procedures of detection by the comparator and transition of the control voltage after the detection are essentially required and the dead time still exists.